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PLDA announced its first PCI Express 6.0 controller

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PLDA, previously, this year, the work of PCI Expresss 5.0 and Compute Express Link as part of the fifth version of the protocol, followed by synopsys, announced the first XPressRich controller design that supports PCI Express 6.0.

The bandwidth of the lines in the PCIe 5.0 standard is 32 Gt / s, and the stable joint work of two boards for such high speed was successfully demonstrated by PLDA earlier; However, the physical layer controller in the demo system was used from Broadcom.

The new modulation scheme allowed to double the bandwidth PCIE 6.0 without transition to an optical connection.

The final PCIe 6.0 specification must be taken until the end of this year, but PLDA is already ready for an IP design of the controller capable of working at a speed of 64 GT / s. To ensure such a speed, it was required to change the Signal modulation scheme with the NRZ on PAM4, the proactive error correction and integrity check (CRC) was also added.

Базовая структура ядра нового контроллера PCIe, разработанного PLDA

The basic structure of the new PCIE controller, developed by PLDA

In modern Code, power consumption is an important parameter, and in the new XPressRich series controller, the dynamic control of the number of active interface lines is maintained – in economy traffic can be transmitted at a smaller number of lines. Configurations are available with lines from 1 to 16. Also available fine power management and clock frequencies.

The new development has support for SR-IOV, can work with PCIE virtual channels, fully inversely compatible with previous versions of PCI Express, and optionally can contain the hardware encryption blocks according to the AES-GCM standard. More complete information about the PLDA Xpressrich PCIE 6.0 controller can be found on the company’s website. Availability in silicon is expected in the fourth quarter of this year. But now, samples are capable of working at a frequency of up to 2 GHz using a 5 nm technical process.

Консорциум PCI-SIG планирует увеличивать пропускную способность вдвое каждые 3 года

PCI-SIG consortium plans to increase bandwidth every 3 years.

However, any noticeable effect of PCI Express 6.0, for sure, gains significantly later, as it happens now with PCIe 4.0 and 5.0 standards – you will have to wait for the development of a new standard by leading developers and manufacturers of processors and other components. Without them, the new tire will be a curious exotic, although in demand: in particular, there are already network solutions at a speed of 800 Gbit / s that could win from the transition to PCIe 6.0.

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